Why BBTLine RF Splitters Combiners? 

                                                      Low Loss
                                                      High Power
                                                      BroadBand
                                                      Excellent Balance
                                                      Low Cost 

Specializing in RF Hardware Design/Prototyping/Simulation/Measurement/Troubleshooting

With over 27 years of RF Hardware Design Experience (DC to 85 GHz), BBTLine, LLC offers you several avenues for your RF Hardware Development needs

BBTLine Offers You Expertise In the Following Areas:


RF Hardware Design

RF Prototyping

RF Simulation

RF Board Layout

RF Measurement and Testing

RF System Analysis (Cascaded Gain, NF, IP3, Mixing, Compression, Spurious, Isolation)

Single-Ended Frequency Domain and Differential Time Domain (Eye Diagram, Jitter) System Analysis And Design

All-around RF Module Design (PCB layout, RF Dielectrics, Mechanical, RF Gasketing, Isolation, Thermal, Tlines, RF Connectors)

One-on-one On-Site (or Remote) Training/Tutorials for High-End Simulators such as Keysight ADS, EMPro, CST and Ansys HFSS

Temporary (Remote and/or On-Site) RF Engineering Support..."RF Engineer For Hire"...To Satisfy Critical Troubleshooting, Testing And/Or Simulation Needs (Near or Far-Term)

RF Connector Launch Design (SMP, SMPM, SMA, Surface and Edge Launch) to 50 GHz

Extensive High Isolation (> 150 dB) RF Module Design

RF Component Selection To meet Overall RF RX/TX Design Goals


BBTLine Offers Extensive Experience With:


High End RF Simulators: HFSS, ADS, CST, EMPro, SPICE along with Modelithics Libraries

Multi-Layer Board Transitions (from basic 2-layer boards to signal transitions through 36 layer boards)

SMA/SMP/SMPM RF Connector Launch Optimization (e.g., 30 dB return loss goals, Measurement/Sim's to 50 GHz)

High-End TDR Simulation and Measurement (e.g., Tektronix 7 ps 20/80 risetime TDR)

Board-Level/Module designs with Isolation greater than 150 dB (Mechanical Housings, Conductive Gasketing, Triple Rows of Staggered Grounding Vias, Separate Shielding Chambers with MicroStrip "Mouseholes", etc.)

High Performance RF board Materials (Isola Astra MT77, Isola Tachyon100G, Rogers 3003, Rogers 4350B) with Loss Tangent And Copper Roughness considerations in HFSS simulations

Transient (Keysight ADS Tran Simulator) and Harmonic Balance (Mixer IMD Spur Tables) Simulations of Cascaded Linear and Non-Linear Systems

32.8 Gb/s Serial Interface Design with Signal Transitions through very high-layer-count (e.g., 36 layers) board transitions and cable transitions

Eye Diagram and Jitter Simulations/Measurements to 32.8 Gb/s Data Rates

Extremely Sensitive Receiver Design (e.g., very low noise figures, -120 dBm power levels)

System level IP3, NF, Gain, Mixer, Spurious simulations and measurements

High Directivity/High Frequency Microstrip Bi-Directional Coupler Design (e.g., 23 dB Directivity at 6 GHz)

PIN Diode Switch and Attenuator design (e.g., M/A Com MASW series PIN diode switches)

PA design (e.g., Hittite HMC637 Distributed Amplifier with RF chokes and biasing servo circuits)

Closed and Open-Loop MEMS Accelerometer System (Full Analog/Digital Chip VHDL Cosimulations with Keysight Ptolemy simulator)

Free-Space optics RX and TX System designs, Fibre Channel GBIC Transceiver design, Avalanche PhotoDiode Receivers

Electromagnetic Simulations...HFSS to 85 GHz, Momentum, Automotive Radar 77 GHz Interposer HFSS simulations
Achieving Tight Correlation Between Simulations and Measurements to 50 GHz

Extensive lab instrumentation and measurement expertise (PSA, PNA to 50 GHz, TDR 7 ps rise, NF meter, Power meter, Low Phase Noise Signal Generators, DCA's)

Optimized HFSS Chip Transitions/Tapers for minimum TDR impact

Extensive Experience with Peregrine Switches and Attenuators, M/A Com PIN Switches, Hittite Distributed Amplifiers, Mini-Circuits Amplifiers and Filters, Etc.

Very High IP3/Dynamic Range measurements utilizing Test Setups with PSA/Amplifiers/Narrow-Band Filters/Isolators/Circulators

Broadband Equalizer Designs to Flatten Amplifier Responses (e.g., flattening three cascaded Mini-Circuits PHA-1 amplifiers to 6 GHz)

HCD-style Interposer (aka "SuperButton") HFSS Simulation (to 85 GHz) and Measurement (to 50 GHz)

Gore and Rosenberger "Midstrip" Cable/Board Interconnection HFSS Simulation, Modification, Design and Measurement


RF Prototyping Scenario:

The plan is to lay out a large and complicated RF board with many stages (LNA's, PA's, Attenuators, Switches, Gain Blocks, Mixers, etc.). But, there is a lack of confidence about the RF performance of the design in certain sections of the proposed layout.

There is concern about Board/Component Parasitics, Lack of Stage-To-Stage Isolation, High Reflections (Poor Return Loss), High Losses, VSWR Interaction Between Stages, etc..

Send BBTLine the relevant files of the design (PCB Artwork Files, Board Stack-Up, Schematic, BOM, etc.).
We will break out the sections of concern on to separate evaluation boards.

These evaluation boards will provide greater insight to each stage's performance and will allow thorough cascade analysis and measurement capability in the lab.

On these evaluation boards, BBTLine will provide RF connector launches into and out of any RF paths of interest and headers for various functions such as power, programming of IC's, logic levels for RF switch positions and/or attenuator settings, etc.

Fast prototyping, of multiple RF stages, on simple individual 2-layer boards, can give excellent insight to each stage's performance and to the overall "bigger picture" cascaded RF circuit performance.

Of course, higher layer-count prototype boards can also be accommodated.
Breaking the larger overall effort in to smaller chunks can save some major headaches (and prevent a lot of scrap hardware) further down the road... as well as freeing you up to focus on other aspects of the project.

Alternately, if a proposed layout does not exist and needs to be derived, the effort can be tailored from this angle, too.

Making mistakes at the initial phase of a design, especially at RF frequencies, costs you 10X in time, money, and effort further down the road...let BBTLine help you inrease the confidence in the overall design from the start.


RF Simulation Scenario:

A design you are considering has several Mini-Circuits-style high frequency filters and you want to explore what impact different Component Pad Geometries, CPWG Geometries, Board Metal Thicknesses, Board Dielectric Thicknesses, etc., will have on the various filter responses.

Let BBTLine take care of this...send a quick sketch outlining what you would like to see simulated. The various PCB layout simulations BBTLine will run, along with the manufacturer S-parameter files for the filters/components, will give you a very good idea of what to expect from the combination of layout effects and component effects.

Final deliverables to you are S-parameter files, layout geometry details, Keysight ADS models, and a Word document summarizing the work performed.

With the Keysight ADS simulator and a very high-end workstation, BBTLine can provide simulation results at both the ADS schematic model level and at the Momentum simulator layout/board level.


RF Measurement Scenario:

There is a component of interest but it does not have an associated evaluation board...let BBTLine take care of this.
Just send us the component information (MFR part number, desired layout sketch, schematic sketch) and we will derive an evaluation board, produce simulation results and perform S-parameter measurements.

The final outputs to you will be an evaluation board, the evaluation board artwork, simulation results and the measured S-parameter data (current Network Analzyer capability is 300 kHz to 9 GHz).

BBTLine can also provide you with S-parameter files for whatever else you may need measured (Eval Boards, RF modules, Connector Launches, etc.).


RF Troubleshooting Scenario:


There is a design with a lengthy broadband signal chain (several gain stages, filters, attenuators, switches, etc.) which is not exhibiting the intended design frequency response, gain, VSWR, isolation, IP3 and/or noise figure predicted by the original system cascade analysis.

Let BBTLine take care of you here on two levels. The first level would be an initial, thorough simulation effort which would include all channel PCB layout effects, manufacturer component S-parameters, component parasitics, board layout parasitics, etc.

If, after this thorough simulation troubleshooting effort, the abnormal behavior cannot be clearly predicted, then an on-site lab troubleshooting effort could be initiated.

This is not a problem...all that is needed is to agree upon is an hourly rate, a duration and per diem living/traveling expenses.


RF Engineer For Hire Scenario:

There is a need to have somebody with significant RF experience on-site for a few days to run some critical testing of your RF modules (Intermodulation performance over temperature, Spurious Mixer Product Troubleshooting, Isolation performance, etc.).

This is not a problem, BBTLine can be there to support this effort. All that is needed is to agree upon an hourly rate and a per diem living/travel expense and BBTLine will travel to your site to fulfill this need.


Simulator Training Scenario:

There is a need to come up to speed with high-end RF/Electromagnetic simulators such as the Keysight Advanced Design System (ADS), the Ansys High Frequency Structure Simulator (HFSS), Keysight EMPro and/or CST...either for your own personal need or for your Engineering Team.

These high-end simulators offer very powerful tools for system design and/or troubleshooting; however, the learning curve is dauntingly steep and usually results in the Engineer not taking the first learning steps.

Yes, Keysight and Ansys do offer training courses for their products; however, it has been BBTLine's experience that these courses are lacking in several regards.

First, the instructors typically have so much material to cover that they fly through it, in a very hands-off manner, resulting in low learning retention.

Second, the material covered is so basic that it has very little bearing on the specific problem(s) you are trying to address.

Third, the cost is high for multi-day training which is not focused towards your specific problem.

BBTLine offers over 20 years of experience using the ADS and HFSS simulators. Due to the high cost of an HFSS license, BBTLine does not currently own an HFSS license (your company would have to provide this for the training effort). BBTLine does, however, have an ADS license.

BBTLine can tailor training efforts towards your desired learning format. The training format can be as flexible and custom as you would like: on-site and one-on-one, using your specific board design files.

Or, remotely, by BBTL running simulations and creating Word documents that provide you with images of your specific board artwork and a clear breakdown of the necessary simulator steps to achieve your simulation goals.


BBTLine Experience:

Mark Derbyshire has a BSEE (1989)/MSEE (1993) and has worked for Agilent (IF-Digitized Geolocation Receiver Design), Honeywell (Excalibur Guided Munition, JDAM, MEMS IMU, MEMS Open/Closed Loop MEMS Accelerometer Design), Raytheon Missile Systems (SM-3 Missile S-Band FSK Receiver Design), Terabeam (Free-Space Optics TX/RX module design, EDFA Ampflication, Avalanche PhotoDiode Receivers), Metawave Communications (SMART Antenna System Design, GSM receiver design (IF-digitized), AMPS/NAMPS receiver design), Vixel (GBIC, E/O Transceivers, VCSEL laser modulation), Altierre (In-Store Pricing RF Update System), Lumedyne (Open/Closed-loop MEMS Accelerometer design), US Navy NUWES Naval Underwater Warfare Engineering Station (MK48 Torpedo, NRS4 Noise Recording System), Teradyne (Semiconductor Test Division, RF Module Design, Proprietary 32.8 Gb/s Serial Interface).

Predominant career experience is at the RF board-level; however, also very experienced with MEMS Closed/Open-Loop Accelerometer Systems (Chip and Board Level...AMI C5 process) and Free-Space Optical TX/RX Systems.

An expert with simulators: ADS, CST, HFSS, EMPro, SPICE. I have used ADS/HFSS/SPICE for over 20 years. Also, very experienced with CST (Time and Frequency Domain Simulators) and Keysight EMPro.

27 total years of experience with RF Board Layout Design and Simulation.

Board Layout/Schematic Tools Utilized: Mentor, Cadence, Altium Designer, ADS, PCAD, PADS, Orcad.

Experienced with: PLL design (Fractional-N and regular), Phase Noise analysis, Alternate/Adjacent channel receiver measurements, GSM receiver design, GSM blocker testing, IP3 measurements, Interdigital Filter design, LPA's, LNA's, Distributed Amplifiers (aka traveling-wave), Butler matrix antenna phasing, ferrite bead combiners, module shielding (with Tennmax conductive gasketing), isolation measurements, high isolation (150 dB) module design, optimizing SMP/SMPM/SMA RF connector launches (edge launch and surface launch) for lowest return loss, low-frequency/chip-level design (AMI C5 process utilizing their FET PDK's), M/A Com MASW PIN diode switches, Peregrine switches/attenuators, SAW filter matching, 6 GHz high directivity 20 dB coupler design, Tline optimization (stripline, CPWG, microstrip), AMPS/NAMPS analog receiver design (SINAD), S-Band FSK receiver design, LPA/Hybrid power-sharing, Broadband Wilkinson splitter/combiner designs, Module Housing Isolation Chambers (working closely with ME's to maximize module isolation), Mixers, Mixer Spurious Product (Harmonic Balance simulations and measurements), VHDL Analog/Digital Co-simulations (with ADS Ptolemy) of entire MEMS accelerometer closed-loop system (analog and digital chips both simulated), VCSEL/Fabry-Perot laser matching and direct modulation, 32.8 Gb/s Eye Optimization of board via transitions (85 GHz HFSS simulations), high reverse-bias avalanche photodiode optical receivers (850 and 1550 nm), 7 ps risetime TDR measurements and simulations, etc.


Two U.S. Patents Held:

U.S. Patent 9,570,792 "RF Splitter/Combiner System and Method"
U.S. Patent 7,409,862 "Systems and Methods For Isolation of Torque and Sense Capacitors of a MEMS Accelerometer"


First Job Free of Charge:

BBTLine offers the first "reasonable" job free of charge. This is offered to ensure that there is a match between what you want and what BBTLine can offer (and to establish an initial working relationship).


Guaranteed Work:

After an initial discussion about the project, BBTLine will review any documents sent and provide an estimate of the time to complete the work (along with an hourly rate). Prior to the work commencing, a discussion of the estimate and a final sign off will commence. If, at the end of the project, you are not 100% satisfied with work performed by BBTLine, your money will be refunded.

Privacy policy